The logic Analyzer is a test instrument i.e digital bus orientation of oscilloscope. The Analyzer detect the state of digital signal during each clock cycle and store them in memory. Than display the information on the CRT similar to oscilloscope. Basically it is an Instrument which allow to see the various signal at "1". With Logic Analyzer we can view the signal status of address bus., Data bus, control bus etc.
This instrument is Control by Micro controller (MC), Figure shows the Functional Block Diagram of logic Analyzer. As the Logic Analyzer display the Logic level "1" and "0" a comparably is put on input. The reference input of comparator is set for Threshold logic/
The Analyzer take the sample of logic level's of the input data and store this sample into a internal RAM. The different Analyzer store's Different sample such as 256,512,1024 sample for each clock input. The clock signal rate ,control bar the internal and external clock . After taking the sample they are store in internal RAM. The trigger signal tell's the Analyzer when to display the sample kept in RAM. With reference to above the external trigger can be used to trigger the Analyzer or a trigger signal from word comparator trigger circuit.A word word comparator compares the desire input signal set by programmer through selection switch. When the words match, the trigger circuit send the trigger signal.
Since the Analyzer continuously take the samples. We can set the Analyzer for pre-triggering mode, Center Triggering Mode and Post triggering Mode.
Ex:
- Pre- triggering mode: If the analyzer display 256 sample before triggering, it know as pre - triggering mode.
- Center triggering mode: If a128 samples are taken before triggering and 128 after triggering
- Post triggering : If 256 sample will be taken after the application of triggering pulse and to be diplay over the CRT.
Thus The logic analyzer is tool to use commonly for detection of fault's in digital system
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