The continuation of the remarkable exponential increases in processing power over the recent past faces imminent challenges due in part to the physics of deep-submicron CMOS devices and the costs of both chip masks and future fabrication plants. A promising solution to these problems is offered by an alternative to CMOS-based computing, chemically assembled electronic nanotechnology (CAEN). In this paper we outline how CAEN-based computing can become a reality. We briefly describe recent work in CAEN and how CAEN will affect computer architecture. We show how the inherently reconfigurable nature of CAEN devices can be exploited to provide high-density chips with defect tolerance at significantly reduced manufacturing costs. We develop a layered abstract architecture for CAEN-based computing devices and we present preliminary results which indicate that such devices will be competitive with CMOS circuits.
Introduction
We are approaching the end of a remarkably successful era in computing: the era where Moore’s Law reigns, where processing power per dollar doubles every year. This success is based in large part on advances in complementary metal-oxide semiconductor (CMOS)-based integrated circuits. Although we have come to expect, and plan for, the exponential increase in processing power in our everyday lives, today Moore’s Law faces imminent challenges both from the physics of deep-submicron CMOS devices and from the costs of both chip masks and next-generation fabrication plants.
A promising alternative to CMOS-based computing under intense investigation is chemically assembled electronic nanotechnology (CAEN), a form of electronic nanotechnology (EN) which uses self-alignment to construct electronic circuits out of nanometer-scale devices that take advantage of quantum-mechanical effects [10, 30]. In this paper we show how CAEN can be harnessed to create useful computational
devices with more than 10 rise to power 10 gate-equivalents per cm2. The fundamental strategy we will use is to substitute compile time (which is inexpensive) for manufacturing precision (which is expensive). We achieve this through a combination of reconfigurable computing, defect tolerance, architectural abstractions and compiler technology. The result will be a high-density low-power substrate which will have inherently lower fabrication costs than CMOS counterparts. Using EN to build computer systems requires new ways
of thinking about computer architecture and compilation. CAEN differs from CMOS: CAEN is extremely unlikely to be used to construct complex aperiodic structures. We introduce an architecture based on fabricating dense regular structures, which we call nanoBlocks, that can be programmed after fabrication to implement complex functions. We call an array of connected nanoBlocks a nanoFabric.
Compared to CMOS, CAEN-based devices have a higher defect density. Such circuits will thus require built-in defect tolerance. A natural method of handling defects is to first configure the nanoFabric for self-diagnosis and then to implement the desired functionality by configuring around the defects. Reconfigurabilty is thus integral to the operation of the nanoFabric. Their nature makes nanoFabrics particularly well suited for reconfigurable computing.
Reconfigurable computing changes as needed the function of programmable logic elements and their connections to storage, building efficient, highly parallel processing kernels, tailored for the application under execution. The network of processing elements is called a reconfigurable fabric.
The data used to program the interconnect and processing elements is called a configuration. Examples of current reconfigurable fabrics are commercial Field Programmable Gate Arrays (FPGAs) such as [39, 2], and research prototypes, e.g. Chimaera [40] and PipeRench [18]. As we show later, one advantage of nanoFabrics over CMOS-based reconfigurable fabrics is that the area overhead for supporting reconfiguration is virtually eliminated. This will magnify the benefits of reconfigurable computing, yielding computing devices that may outperform traditional ones by orders of magnitude in many metrics, such as computing elements per cm2 and operations per watt.
In the next section we present some recent research results, which indicate CAEN will be a successful technolgy
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